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Fix TurboMind vision workspace overflows - #4924

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irexyc wants to merge 2 commits into
InternLM:mainfrom
irexyc:fix-vit
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Fix TurboMind vision workspace overflows#4924
irexyc wants to merge 2 commits into
InternLM:mainfrom
irexyc:fix-vit

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@irexyc irexyc commented Sep 1, 2026

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Summary

This PR prevents InternViT and QwenViT from exceeding the language model's shared symmetric buffer.

Changes

InternViT

  • Calculate how many image tiles fit in symm_buf.
  • Split oversized vision batches into tile-based micro-batches.
  • Write each chunk directly into the final image embedding tensor.
  • Fail clearly if the buffer cannot hold one tile.

QwenViT

  • Check hidden-state and merger workspace sizes before ViT execution.
  • Continue using symm_buf when capacity is sufficient.
  • With NCCL, fall back per stage to regular device buffers when necessary.
  • With CUDA IPC/native, fail early with detailed capacity information.

The QwenViT change covers Qwen2-VL, Qwen2.5-VL, and Qwen3.5/3.6/3.8 VLMs.

Copilot AI lite review requested due to automatic review settings September 1, 2026 06:10

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Pull request overview

This PR addresses TurboMind vision-model workspace overruns by proactively planning symmetric-buffer usage and introducing chunking logic when inputs exceed the language model’s shared symmetric buffer capacity.

Changes:

  • QwenViT: pre-compute hidden/merger workspace requirements vs. symm_buf, enforce early failure for non-NCCL communicators when capacity is insufficient, and selectively fall back to regular device buffers where allowed.
  • InternViT: compute per-tile workspace requirements and split oversized batches into tile-based micro-batches, writing each chunk directly into the final image_embeds tensor.

Reviewed changes

Copilot reviewed 2 out of 2 changed files in this pull request and generated 1 comment.

File Description
src/turbomind/models/qwenvit/qwenvit.cc Adds symmetric-buffer workspace planning and communicator-specific fallback/early-fail behavior.
src/turbomind/models/internvit/internvit.cc Adds tile micro-batching to keep InternViT intermediate workspaces within symmetric-buffer limits.

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Comment thread src/turbomind/models/internvit/internvit.cc
@lvhan028 lvhan028 added the Bug:P0 label Sep 2, 2026
@lvhan028
lvhan028 requested a review from lzhangzz September 7, 2026 03:04
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3 participants